Conference Paper



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DRIVES

A.
 
Digital Circuit 
The digital portion circuit is the core of the developed 
system and it is based on a microcontroller, produced by 
Microchip, namely dsPIC33FJ12GP201, which is a general 
purpose 16-Bits microcontroller, with several built-in 
peripherals, such as Timers, Analog Digital Converter 
(ADC), 
Universal 
Synchronous/Asynchronous 
Serial 
Receiver/Transmitter (USART) and others. 
The main functionalities executed by the microcontroller 
are: Selectable drive schemas, being available full step, half 
step and microstep 1/4 and 1/8; Current reference, controlled 
according to the active drive scheme; Digital interface for 
pulse, direction and enable signals; signal comparison; 
Digital control of power transistors. Figure 4 presents some 
variables and services that run within the microcontroller in 
order to implement such functionalities. 
There are four lookup tables, one for each available 
driving schema and only one can be active at a time. Current 
reference comes from the active lookup table in a given 
index, stored at the variable Npos. 
D
ir
e
ç
ã
o
P
a
s
so
Figure 4 – Block diagram of variables and services that 
run on dsPIC33FJ12GP201. 
An Acquisition service runs at 50 KHz. After acquisition 
cycle, outputs that control the power switches are turned on 
and off according to the comparison result of the current 
reference and the read current. 
A Pulse monitoring service runs whenever the state of the 
pulse digital signal chances from high to low - the falling 
edge - and increments or decrements the variable 
Npos

according to the state of the direction digital input. The 
variable 
Npos
is bounded according to the size of the active 
table and wraps around whenever it reaches its upper or 
lower limits. 
The real change on the stepper motors' position will take 
place on the next acquisition cycle, where the switches are to 
be controlled according to the new index on the active 
lookup table. 
B.
 
Power Circuits
At the power stage, it was employed and monolithic IC, 
namely L298, which integrates two H-Bridges and its 
transistors drives circuits. The H-Bridge is based on Bipolar 
Junction Transistor (BJT). Its maximum voltage is 40 V and 
is capable of carrying 2 A by each bridge. External free-
wheeling, fast recovery diodes were used, to allow current 
flow on the opposite direction of the BJT’s orientation. 
The switches are controlled by digital inputs, turning them 
on and off according to the drive’s logic. In series with the 
load, more exactly under the low voltage side transistor, a 
low resistance resistor was placed, generating a voltage 
signal proportional to the load current. Such voltage is used 
as input to the analog conditioning circuit. 


C.
 
Analog Circuit 
There are a few operations needed to be carried out on the 
current-proportional voltage signal before it can be used as 
input to the ADC. These operations are: scaling and filtering. 
Signal shifting was not necessary on this case, since the 
signal of interest is positive only. 
Filtering is necessary to preserve the spectral content of 
the interest signal on the sampling process. Scaling is 
necessary to reduce the error introduced on the discretization 
process and to allow the signal to swing through the entire 
range of the ADC. 
The circuit on Figure 5 presents this functionality. 
(
) *
(
forms a first order, low pass filter, with a cutoff 
frequency given by: 
+
,-$!((
=
1
(
. *
(
. 2. .
(2)
The op-amp 
/01
the resistive network 
1 ) 2
forms 
a non-inverting amplifier, whose gain is given by: 
= 1
+ 13
(3)
Figure 5 – Schematics of the current conditioning circuit. 
The transfer function of the whole circuit is given by: 
(4) =
5!"#$
. (

)
6
5!"#$

(
7. *
(
. 4 + 1
.
1
(4)
Since the conditioned signal is sampled at 50 KHz, 15 
Khz band limiting would work just fine to avoid aliasing. 
Since 15 KHz cutoff frequency is hard to achieve with 
regular discrete components, the cutoff frequency was 
approximated to 15.157 KHz. To yield such frequency, along 
with an overall gain of 0.5 V/A, the employed values were: 
(
= 7 9Ω
= 40 9Ω
*
(
= 1,5 >
= 10 9Ω
!"#$
= 0.1 Ω
IV.
RESULTS 
The system was built in a printed circuit board and is part 
of a CNC milling/router system. The built system is 
illustrated by Figure 6. 
There were made two tests with the system: current 
regulation; and the overall current waveform for three of the 
driving schemas. All measurements were made with an 
oscilloscope, with the gain of 0.47 V/A. The current signal 
could not be directly measured, due to lack of correct 
instrumentation – a high performance Hall Effect current 
clamp –, so the current was measured through 
!"#$.
itself. 
Due to this fact, all the negative current swing was reflected 
and observed as a positive swing, i.e. its absolute value was 
observed. 
Figure 6 – Stepper motor driving system developed. 
Figure 7 shows the current ripple for one of the phases 
with a set-point of 2A. The output voltage, given a 

load 
current, is 
0.94 @
, which is close to the mean value shown in 
Figure 7. The value of 
0.950 @
A5B
was read, that yields a 
load current of 
2.0212 
, that in turns corresponds to an 
absolute error of 
C
DEF
= 0,0212 
and a percentual error of 
C
%
= 1,1 %
. The peak-to-peak load current ripple read was 
H#IJ
= 0,097 
and, percentually, 
H#IJ
%
= 4,888 %

Figure 7 – Ripple of load current. 
Next, the results achieved with two driving schemas are 
shown. Figures 8 and 9 presents the actual current waveform 
measured and the ideal current waveform, respectively, for a 
half-step driving schema.
Figure 8 – Measured current waveform for half step driving 
schema. 


Figure 9 – Ideal current waveform for half step driving 
schema. 
Figures 10 and 11 present the actual current waveform 
measured and the ideal current waveform, respectively, for a 
micro step 1/4 driving schema. 
Figure 10 – Measured current waveform for micro step ¼ 
driving schema. 
Figure 11 – Ideal current waveform for micro step ¼ driving 
schema. 
V.
CONCLUSION 
The stepper motor drive is base of the low cost positioning 
system. Currently, this topology is being largely employed 
on low cost CNC systems, whose applications are as varied 
as possible, being successfully applied to machining, pick-
and-place, 3D plastic printing and many others.
A stepper motor driving system was developed described 
in this paper. The designed system is based on low cost 
devices and performed as expected, with its performance 
parameters within the expected. The experimental results 
obtained from the developed system are presented. As 
indicated by the measured current waveform plots, the 
developed system could regulate the load current according 
to the selected driving schemas. 
VI.
ACKNOWLEDGEMENT 
The authors would like to acknowledge: CNPq, for 
supporting this research; Oyamota do Brasil, for supporting 
the manufacturing of mechanical system; CEAMAZON, for 
supporting high-end research and continuously effort on 
producing human resources. 
VII.
REFERENCES 
[1] 
N. Dahm, M. Huebner, and J. Becker, "Approach of 
an FPGA based adaptive stepper motor control system," 

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