Realization of T Flip Flop using gates and D Flip Flop
Truth table for the T Flip Flop
T Clock Qn Qn+1
0 0 X Qn
0 1
X Qn
1 0
Q Qn
1 1
Q Q^
A High state in the clock column indicates that the clock generates square waves making a 0 to 1 and 1 to 0
transitions.
The Qn column is the state of the flip flop prior to the clock application and the Qn+1 column is the state of
the flip flop after the clock.
An x indicates don’t care condition.
Ladder Logic Diagram of this can be obtained by creating One Shot of T Input.
This can be done in PLCs such as Allen Bradley directly by using OSR instruction. OSR stands for One Shot
Rise which when input is given, it simply triggers an event to occur one time.
Many PLCs do not have this instruction. By adding one more extra relay or by storing bit status keeping in
mind the scan cycle and order of rungs in programming, One Shot can be obtained.
PLC Program
Here is PLC program to
Implement T Flip Flop, along with program explanation and run time test cases.
List
of Inputs and Outputs
T(Toggle)
=
I:1/0
(Input)
Qn Output/Light =
O:2/0
(Output)
Relay Bit
=
B3:0/0
(Bit 0 Output)
One Shot
=
O:2/1
(OS logic Output)
OSR Bit =
B3:0/15 (OSR instruction)
