TJT
Transmit Jabber Timeout
This bit indicates that the Transmit Jabber Timer expired, meaning that the transmitter had been excessively active. The transmission process is aborted and placed in the Stopped state. This causes the Transmit Jabber
Timeout TDES0[14] flag to assert.
2
W1C
0x0
TU
Transmit Buffer Unavailable
This bit indicates that the Next Descriptor in the Transmit List is owned by the host and cannot be acquired by the DMA. Transmission is suspended. Bits[22:20] explain the Transmit Process state transitions. To resume processing transmit descriptors, the host should change the ownership of the bit of the descriptor and then issue a Transmit Poll Demand command.
1
W1C
0x0
TPS
Transmit Process Stopped
This bit is set when the transmission is stopped.
0
W1C
0x0
TI
Transmit Interrupt
This bit indicates that frame transmission is finished and TDES1[31] is set in the First Descriptor.
Only
T-chip
GMAC_OP_MODE
Address: Operational Base + offset (0x1018) Operation Mode Register
