NIE
Normal Interrupt Summary Enable
When this bit is set, a normal interrupt is enabled. When this bit is reset, a normal interrupt is disabled. This bit enables the following bits:
Register GMAC_STATUS[0]: Transmit Interrupt
Register GMAC_STATUS[2]: Transmit Buffer Unavailable
Register GMAC_STATUS[6]: Receive Interrupt
Register GMAC_STATUS[14]: Early Receive
Interrupt
15
RW
0x0
AIE
Abnormal Interrupt Summary Enable
When this bit is set, an Abnormal Interrupt is enabled. When this bit is reset, an
Abnormal Interrupt is disabled. This bit enables the following bits
Register GMAC_STATUS[1]: Transmit Process Stopped
Register GMAC_STATUS[3]: Transmit Jabber Timeout
Register GMAC_STATUS[4]: Receive Overflow Register GMAC_STATUS[5]: Transmit Underflow
Register GMAC_STATUS[7]: Receive Buffer Unavailable
Register GMAC_STATUS[8]: Receive Process Stopped
Register GMAC_STATUS[9]: Receive Watchdog Timeout
Register GMAC_STATUS[10]: Early Transmit Interrupt
Register GMAC_STATUS[13]: Fatal Bus Error
14
RW
0x0
ERE
Early Receive Interrupt Enable
When this bit is set with Normal Interrupt Summary Enable (BIT 16), Early Receive Interrupt is enabled. When this bit is reset,
Early Receive Interrupt is disabled.
