Chapter 41 gmac ethernet Interface

MAC Initialization

Only
The following MAC Initialization operations can be performed after the DMA initialization sequence. If the MAC Initialization is done before the DMA is set-up, then enable the MAC receiver (last step below) only after the DMA is active. Otherwise, received frames will fill the RxFIFO and overflow. Steps (1) and (2) are to be followed if the TBI/SGMII/RTBI PHY interface is enabled, otherwise follow steps (3) and (4).

1. 
   Program the AN Control register GMAC_AN_CTRL to enable Auto-negotiation ANE (bit-12). Setting ELE (bit-14) of this register will enable the PHY to loop back the transmit data.
   
2. 
   Check the AN Status Register GMAC_AN_STATUS for completion of the Auto-negotiation process. ANC (bit-5) should be set, and link status (bit-2), when set, indicates that the link is up.
   
3. 
   
   T-chip
   Program the register GMAC_GMII_ADDR for controlling the management cycles for external PHY, for example, Physical Layer Address PA (bits 15-11). Also set bit 0 (GMII Busy) for writing into PHY and reading from PHY.
   
4. 
   Read the 16-bit data of (GMAC_GMII_DATA) from the PHY for link up, speed of operation, and mode of operation, by specifying the appropriate address value in register GMAC_GMII_ADDR (bits 15-11).
   
5. 
   Provide the MAC address registers (GMAC_MAC_ADDR0_HI and GMAC_MAC_ADDR0_LO). If more than one MAC address is enabled in your configuration (during configuration in coreConsultant), program them appropriately).
   
6. 
   If Hash filtering is enabled in your configuration, program the Hash filter register (GMAC_HASH_TAB_HI and GMAC_HASH_TAB_LO).
   
7. 
   Program the following fields to set the appropriate filters for the incoming frames in register GMAC_MAC_FRM_FILT
   
   1. 
      Receive All
      
   2. 
      Promiscuous mode
      
   3. 
      Hash or Perfect Filter
      
   4. 
      Unicast, Multicast, broad cast and control frames filter settings etc.
      
8. 
   Program the following fields for proper flow control in register GMAC_FLOW_CTRL.
   
   1. 
      Pause time and other pause frame control bits
      
   2. 
      Receive and Transmit Flow control bits
      
   3. 
      Flow Control Busy/Backpressure Activate
      
9. 
   Program the Interrupt Mask register bits, as required, and if applicable, for your configuration.
   
10. 
    Program the appropriate fields in register GMAC_MAC_CONF for example, Inter-frame gap while transmission, jabber disable, etc. Based on the Auto-negotiation you can set the Duplex mode (bit 11), port select (bit 15), etc.
    
11. 
    Set the bits Transmit enable (TE bit-3) and Receive Enable (RE bit-2) in register GMAC_MAC_CONF.