Execute The execution circuitry is centered


In the normal Harvard manner



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The PIC16F84 Microcontroller Part 2

In the normal Harvard manner, the execution unit is separated from the fetch unit, with distinct data bus, address bus and stores. It is of course controlled via the Instruction decoder which is fed from the bottom of the pipeline in the fetch unit. The fetch Program Counter is in the Data store’s address space so the execution unit can effect the fetch sequence by altering the Program Counter, as shown in Program 6.4.
The execute unit is also sequenced by the same four clock phases as the fetch unit operating in parallel.
Q1: Decode instruction.
Q2: Read from Data store.
Q3: Process data in ALU.
Q4: Write into Data store.

Program store


The majority of PIC devices use EPROM for program memory. As EPROM can only be erased using UV radiation (see Fig. 2.11) once the software has been programmed into the Program store it can be considered effectively permanently in situ. Such devices are known as One-Time Programmable (OTP). Where it is likely that program code will need to be subsequently altered, the MCU may be housed in a ceramic package with a quartz window, allowing for erasure in around 20 minutes.
An alternative approach is to implement the Program store using EEP-ROM technology.This allows the ‘fixed’ data to be erased electrically without the expense of a UV transparent package and the time delay inherent with this technology. Using this approach, code can even be reprogrammed in the field, to subsequently upgrade software, without the device having to be removed from the circuit board. Thus, say, a modem’s algorithm or a PC’s BIOS can be upgraded over a computer network by the user. Microchip’s strategy is to substantially increase the number of EEPROM devices but at the time of writing (2000) most devices are EPROM based.
The 16F84 holds its program code in an internal flash EEPROM memory18 holding 1024 (210) instructions, each of 14-bits width. This memory is accessed from the fetch unit via the 14-bit Program data bus into the pipelined Instruction register 1, and is addressed via the Program address bus by the lower ten bits of the Program Counter PC[9.. .0]. The address range is 000…3FFh. As the Program Counter is 13 bits wide, other members of the 14-bit core family can potentially interact with a 213 = 8 kbyte-instruction Program store; for example, the PIC16F876/7.
All members of the mid-range PIC family use address 000h as the Reset vector (the place the PIC goes to when it is reset, for the startup of the program) and 004h for the Interrupt vector – the place the PIC goes to whenever it gets an interrupt request.

Data store



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