Ladder Logic (lad) for S7-300 and S7-400 Programming
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English Mnemonics German Mnemonics Program Elements Catalog Description OV ---| |--- OV ---| |--- Status bits Exception Bit Overflow ---( P )--- ---( P )--- Bit logic Instruction Positive RLO Edge Detection POS POS Bit logic Instruction Address Positive Edge Detection ---( R ) ---( R ) Bit logic Instruction Reset Coil ---(RET) ---(RET) Program control Return ROL_DW ROL_DW Shift/Rotate Rotate Left Double Word ROR_DW ROR_DW Shift/Rotate Rotate Right Double Word ROUND ROUND Convert Round to Double Integer RS RS Bit logic Instruction Reset-Set Flip Flop ---( S ) ---( S ) Bit logic Instruction Set Coil ---( SAVE ) ---( SAVE ) Bit logic Instruction Save RLO into BR Memory ---( SC ) ---( SZ ) Counters Set Counter Value S_CD Z_RUECK Counters Down Counter S_CU Z_VORW Counters Up Counter S_CUD ZAEHLER Counters Up-Down Counter ---( SD ) ---( SE ) Timers On-Delay Timer Coil ---( SE ) ---( SV ) Timers Extended Pulse Timer Coil ---( SF ) ---( SA ) Timers Off-Delay Timer Coil SHL_DW SHL_DW Shift/Rotate Shift Left Double Word SHL_W SHL_W Shift/Rotate Shift Left Word SHR_DI SHR_DI Shift/Rotate Shift Right Double Integer SHR_DW SHR_DW Shift/Rotate Shift Right Double Word SHR_I SHR_I Shift/Rotate Shift Right Integer SHR_W SHR_W Shift/Rotate Shift Right Word SIN SIN Floating point Instruction Establish the Sine Value S_ODT S_EVERZ Timers On-Delay S5 Timer S_ODTS S_SEVERZ Timers Retentive On-Delay S5 Timer S_OFFDT S_AVERZ Timers Off-Delay S5 Timer ---( SP ) ---( SI ) Timers Pulse Timer Coil S_PEXT S_VIMP Timers Extended Pulse S5 Timer S_PULSE S_IMPULS Timers Pulse S5 Timer SQR SQR Floating point Instruction Establish the Square SQRT SQRT Floating point Instruction Establish the Square Root SR SR Bit logic Instruction Set-Reset Flip Flop ---( SS ) ---( SS ) Timers Retentive On-Delay Timer Coil SUB_DI SUB_DI Integer Math Instruction Subtract Double Integer SUB_I SUB_I Integer Math Instruction Subtract Integer SUB_R SUB_R Floating point Instruction Subtract Real Overview of All LAD Instructions A.1 LAD Instructions Sorted According to English Mnemonics (International) Ladder Logic (LAD) for S7-300 and S7-400 Programming 188 Reference Manual, 04/2017, A5E41524738-AA English Mnemonics German Mnemonics Program Elements Catalog Description TAN TAN Floating point Instruction Establish the Tangent Value TRUNC TRUNC Convert Truncate Double Integer Part UO ---| |--- UO ---| |--- Status bits Exception Bit Unordered WAND_DW WAND_DW Word logic Instruction AND Double Word WAND_W WAND_W Word logic Instruction AND Word WOR_DW WOR_DW Word logic Instruction OR Double Word WOR_W WOR_W Word logic Instruction OR Word WXOR_DW WXOR_DW Word logic Instruction Exclusive OR Double Word WXOR_W WXOR_W Word logic Instruction Exclusive OR Word Overview of All LAD Instructions A.2 LAD Instructions Sorted According to German Mnemonics (SIMATIC) Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 189 A.2 LAD Instructions Sorted According to German Mnemonics (SIMATIC) German Mnemonics English Mnemonics Program Elements Catalog Description ---| |--- ---| |--- Bit logic Instruction Normally Open Contact (Address) ---|/|--- ---|/|--- Bit logic Instruction Normally Closed Contact (Address) ---( ) ---( ) Bit logic Instruction Output Coil ---(#)--- ---(#)--- Bit logic Instruction Midline Output ==0 ---| |--- ==0 ---| |--- Status bits Result Bit Equal 0 >0 ---| |--- >0 ---| |--- Status bits Result Bit Greater Than 0 >=0 ---| |--- >=0 ---| |--- Status bits Result Bit Greater Equal 0 <=0 ---| |--- <=0 ---| |--- Status bits Result Bit Less Equal 0 <0 ---| |--- <0 ---| |--- Status bits Result Bit Less Than 0 <>0 ---| |--- <>0 ---| |--- Status bits Result Bit Not Equal 0 ABS ABS Floating point Instruction Establish the Absolute Value of a Floating-Point Number ACOS ACOS Floating point Instruction Establish the Arc Cosine Value ADD_DI ADD_DI Integer Math Instruction Add Double Integer ADD_I ADD_I Integer Math Instruction Add Integer ADD_R ADD_R Floating point Instruction Add Real ASIN ASIN Floating point Instruction Establish the Arc Sine Value ATAN ATAN Floating point Instruction Establish the Arc Tangent Value BCD_DI BCD_DI Convert BCD to Double Integer BCD_I BCD_I Convert BCD to Integer BIE ---| |--- BR ---| |--- Status bits Exception Bit Binary Result ----(CALL) ----(CALL) Program control Call FC SFC from Coil (without Parameters) CALL_FB CALL_FB Program control Call FB from Box CALL_FC CALL_FC Program control Call FC from Box CALL_SFB CALL_SFB Program control Call System FB from Box CALL_SFC CALL_SFC Program control Call System FC from Box CEIL CEIL Convert Ceiling CMP >=D CMP >=D Compare Compare Double Integer (==, <>, >, <, >=, <=) CMP >=I CMP >=I Compare Compare Integer (==, <>, >, <, >=, <=) CMP >=R CMP >=R Compare Compare Real (==, <>, >, <, >=, <=) COS COS Floating point Instruction Establish the Cosine Value DI_BCD DI_BCD Convert Double Integer to BCD DI_R DI_R Convert Double Integer to Floating-Point DIV_DI DIV_DI Integer Math Instruction Divide Double Integer Overview of All LAD Instructions A.2 LAD Instructions Sorted According to German Mnemonics (SIMATIC) Ladder Logic (LAD) for S7-300 and S7-400 Programming 190 Reference Manual, 04/2017, A5E41524738-AA German Mnemonics English Mnemonics Program Elements Catalog Description DIV_I DIV_I Integer Math Instruction Divide Integer DIV_R DIV_R Floating point Instruction Divide Real EXP EXP Floating point Instruction Establish the Exponential Value FLOOR FLOOR Convert Floor I_BCD I_BCD Convert Integer to BCD I_DI I_DI Convert Integer to Double Integer INV_I INV_I Convert Ones Complement Integer INV_DI INV_DI Convert Ones Complement Double Integer ---(JMP) ---(JMP) Jumps Conditional Jump ---(JMP) ---(JMP) Jumps Unconditional Jump ---(JMPN) ---(JMPN) Jumps Jump-If-Not LABEL LABEL Jumps Label LN LN Floating point Instruction Establish the Natural Logarithm ---(MCR>) ---(MCR>) Program control Master Control Relay Off ---(MCR<) ---(MCR<) Program control Master Control Relay On ---(MCRA) ---(MCRA) Program control Master Control Relay Activate ---(MCRD) ---(MCRD) Program control Master Control Relay Deactivate MOD_DI MOD_DI Integer Math Instruction Return Fraction Double Integer MOVE MOVE Move Assign a Value MUL_DI MUL_DI Integer Math Instruction Multiply Double Integer MUL_I MUL_I Integer Math Instruction Multiply Integer MUL_R MUL_R Floating point Instruction Multiply Real ---( N )--- ---( N )--- Bit logic Instruction Negative RLO Edge Detection NEG NEG Bit logic Instruction Address Negative Edge Detection NEG_DI NEG_DI Convert Twos Complement Double Integer NEG_I NEG_I Convert Twos Complement Integer NEG_R NEG_R Convert Negate Floating-Point Number ---| NOT |--- ---| NOT |--- Bit logic Instruction Invert Power Flow ---( OPN ) ---( OPN ) DB call Open Data Block: DB or DI OS ---| |--- OS ---| |--- Status bits Exception Bit Overflow Stored OV ---| |--- OV ---| |--- Status bits Exception Bit Overflow ---( P )--- ---( P )--- Bit logic instructio Positive RLO Edge Detection POS POS Bit logic Instruction Address Positive Edge Detection ---( R ) ---( R ) Bit logic Instruction Reset Coil ---(RET) ---(RET) Program control Return ROL_DW ROL_DW Shift/Rotate Rotate Left Double Word ROR_DW ROR_DW Shift/Rotate Rotate Right Double Word ROUND ROUND Convert Round to Double Integer Overview of All LAD Instructions A.2 LAD Instructions Sorted According to German Mnemonics (SIMATIC) Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 191 German Mnemonics English Mnemonics Program Elements Catalog Description RS RS Bit logic Instruction Reset-Set Flip Flop ---( S ) ---( S ) Bit logic Instruction Set Coil ---( SA ) ---( SF ) Timers Off-Delay Timer Coil ---( SAVE ) ---( SAVE ) Bit logic Instruction Save RLO into BR Memory S_AVERZ S_OFFDT Timers Off-Delay S5 Timer ---( SE ) ---( SD ) Timers On-Delay Timer Coil S_EVERZ S_ODT Timers On-Delay S5 Timer SHL_DW SHL_DW Shift/Rotate Shift Left Double Word SHL_W SHL_W Shift/Rotate Shift Left Word SHR_DI SHR_DI Shift/Rotate Shift Right Double Integer SHR_DW SHR_DW Shift/Rotate Shift Right Double Word SHR_I SHR_I Shift/Rotate Shift Right Integer SHR_W SHR_W Shift/Rotate Shift Right Word ---( SI ) ---( SP ) Timers Pulse Timer Coil S_IMPULS S_PULSE Timers Pulse S5 Timer SIN SIN Floating point Instruction Establish the Sine Value SQR SQR Floating point Instruction Establish the Square SQRT SQRT Floating point Instruction Establish the Square Root SR SR Bit logic Instruction Set-Reset Flip Flop ---( SS ) ---( SS ) Timers Retentive On-Delay Timer Coil S_SEVERZ S_ODTS Timers Retentive On-Delay S5 Timer SUB_DI SUB_DI Integer Math Instruction Subtract Double Integer SUB_I SUB_I Integer Math Instruction Subtract Integer SUB_R SUB_R Floating point Instruction Subtract Real ---( SV ) ---( SE ) Timers Extended Pulse Timer Coil S_VIMP S_PEXT Timers Extended Pulse S5 Timer ---( SZ ) ---( SC ) Counters Set Counter Value TAN TAN Floating point Instruction Establish the Tangent Value TRUNC TRUNC Convert Truncate Double Integer Part UO ---| |--- UO ---| |--- Status bits Exception Bit Unordered WAND_DW WAND_DW Word logic Instruction AND Double Word WAND_W WAND_W Word logic Instruction AND Word WOR_DW WOR_DW Word logic Instruction OR Double Word WOR_W WOR_W Word logic Instruction OR Word WXOR_DW WXOR_DW Word logic Instruction Exclusive OR Double Word Overview of All LAD Instructions A.2 LAD Instructions Sorted According to German Mnemonics (SIMATIC) Ladder Logic (LAD) for S7-300 and S7-400 Programming 192 Reference Manual, 04/2017, A5E41524738-AA German Mnemonics English Mnemonics Program Elements Catalog Description WXOR_W WXOR_W Word logic Instruction Exclusive OR Word ZAEHLER S_CUD Counters Up-Down Counter ----(ZR) ----(CD) Counters Down Counter Coil Z_RUECK S_CD Counters Down Counter ---( ZV ) ----(CU) Counters Up Counter Coil Z_VORW S_CU Counters Up Counter Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 193 B Programming Examples B.1 Overview of Programming Examples Practical Applications Each ladder logic instruction described in this manual triggers a specific operation. When you combine these instructions into a program, you can accomplish a wide variety of automation tasks. This chapter provides the following examples of practical applications of the ladder logic instructions: • Controlling a conveyor belt using bit logic instructions • Detecting direction of movement on a conveyor belt using bit logic instructions • Generating a clock pulse using timer instructions • Keeping track of storage space using counter and comparison instructions • Solving a problem using integer math instructions • Setting the length of time for heating an oven Instructions Used Mnemonik Program Elements Catalog Description WAND_W Word logic instruction (Word) And Word WOR_W Word logic instruction (Word) Or Word --- ( CD ) Counters Down Counter Coil --- ( CU ) Counters Up Counter Coil ---( R ) Bit logic instruction Reset Coil ---( S ) Bit logic instruction Set Coil ---( P ) Bit logic instruction Positive RLO Edge Detection ADD_I Floating-Point instruction Add Integer DIV_I Floating-Point instruction Divide Integer MUL_I Floating-Point instruction Multiply Integer CMP <=I, CMP >=I Compare Compare Integer ––| |–– Bit logic instruction Normally Open Contact ––| / |–– Bit logic instruction Normally Closed Contact ––( ) Bit logic instruction Output Coil ---( JMPN ) Jumps Jump-If-Not ---( RET ) Program control Return MOVE Move Assign a Value --- ( SE ) Timers Extended Pulse Timer Coil Programming Examples B.2 Example: Bit Logic Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 194 Reference Manual, 04/2017, A5E41524738-AA B.2 Example: Bit Logic Instructions Example 1: Controlling a Conveyor Belt The following figure shows a conveyor belt that can be activated electrically. There are two push button switches at the beginning of the belt: S1 for START and S2 for STOP. There are also two push button switches at the end of the belt: S3 for START and S4 for STOP. It it possible to start or stop the belt from either end. Also, sensor S5 stops the belt when an item on the belt reaches the end. MOTOR_ON S1 S2 O Start O Stop S3 S4 O Start O Stop Sensor S5 Absolute and symbolic Programming You can write a program to control the conveyor belt using absolute values or symbols that represent the various components of the conveyor system. You need to make a symbol table to correlate the symbols you choose with absolute values (see the STEP 7 Online Help). System Component Absolute Address Symbol Symbol Table Push Button Start Switch I 1.1 S1 I 1.1 S1 Push Button Stop Switch I 1.2 S2 I 1.2 S2 Push Button Start Switch I 1.3 S3 I 1.3 S3 Push Button Stop Switch I 1.4 S4 I 1.4 S4 Sensor I 1.5 S5 I 1.5 S5 Motor Q 4.0 MOTOR_ON Q 4.0 MOTOR_ON Programming Examples B.2 Example: Bit Logic Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 195 Ladder Logic Program to control the conveyor belt Network 1: Pressing either start switch turns the motor on. I 1.1 I 1.3 S Q 4.0 S1 S3 Network 2: Pressing either stop switch or opening the normally closed contact at the end of the belt turns the motor off. I 1.2 R Q 4.0 S2 I 1.4 S4 I 1.5 S5 Programming Examples B.2 Example: Bit Logic Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 196 Reference Manual, 04/2017, A5E41524738-AA Example 2: Detecting the Direction of a Conveyor Belt The following figure shows a conveyor belt that is equipped with two photoelectric barriers (PEB1 and PEB2) that are designed to detect the direction in which a package is moving on the belt. Each photoelectric light barrier functions like a normally open contact. PEB1 PEB2 Q 4.1 Q 4.0 Absolute and symbolic Programming You can write a program to activate a direction display for the conveyor belt system using absolute values or symbols that represent the various components of the conveyor system. You need to make a symbol table to correlate the symbols you choose with absolute values (see the STEP 7 Online Help). System Component Absolute Address Symbol Symbol Table Photoelectric barrier 1 I 0.0 PEB1 I 0.0 PEB1 Photoelectric barrier 2 I 0.1 PEB2 I 0.1 PEB2 Display for movement to right Q 4.0 RIGHT Q 4.0 RIGHT Display for movement to left Q 4.1 LEFT Q 4.1 LEFT Pulse memory bit 1 M 0.0 PMB1 M 0.0 PMB1 Pulse memory bit 2 M 0.1 PMB2 M 0.1 PMB2 Programming Examples B.3 Example: Timer Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 197 Ladder Logic Program for Detecting the Direction of a Conveyor Belt Network 1: If there is a transition in signal state from 0 to 1 (positive edge) at input I 0.0 and, at the same time, the signal state at input I 0.1 is 0, then the package on the belt is moving to the left. I 0.0 PEB1 P M 0.0 PMB1 I 0.1 PEB2 S Q 4.1 LEFT Network 2: If there is a transition in signal state from 0 to 1 (positive edge) at input I 0.1 and, at the same time, the signal state at input I 0.0 is 0, then the package on the belt is moving to the right. If one of the photoelectric light barriers is broken, this means that there is a package between the barriers. I 0.1 PEB2 P M 0.1 PMB2 I 0.0 PEB1 S Q 4.0 RIGHT Network 3: If neither photoelectric barrier is broken, then there is no package between the barriers. The direction pointer shuts off. R Q 4.1 LEFT I 0.1 PEB2 I 0.0 PEB1 R Q 4.0 RIGHT Programming Examples B.3 Example: Timer Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 198 Reference Manual, 04/2017, A5E41524738-AA B.3 Example: Timer Instructions Clock Pulse Generator You can use a clock pulse generator or flasher relay when you need to produce a signal that repeats periodically. A clock pulse generator is common in a signalling system that controls the flashing of indicator lamps. When you use the S7-300, you can implement the clock pulse generator function by using time- driven processing in special organization blocks. The example shown in the following ladder logic program, however, illustrates the use of timer functions to generate a clock pulse. The sample program shows how to implement a freewheeling clock pulse generator by using a timer. Ladder Logic Program to Generate a Clock Pulse (pulse duty factor 1:1) Network 1: If the signal state of timer T1 is 0, load the time value 250 ms into T1 and start T1 as an extended-pulse timer. T1 SE M0.2 S5T#250MS Network 2: The state of the timer is saved temporarily in an auxiliary memory marker. M0.2 T1 Network 3: If the signal state of timer T1 is 1, jump to jump label M001. M001 JMP M0.2 Network 4: When the timer T1 expires, the memory word 100 is incremented by 1. ADD_I IN1 ENO EN IN2 OUT MW100 1 MW100 Programming Examples B.3 Example: Timer Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 199 Network 5: The MOVE instruction allows you to output the different clock frequencies at outputs Q12.0 through Q13.7. MW100 MOVE IN OUT EN ENO AW12 M001 Signal Check A signal check of timer T1 produces the following result of logic operation (RLO) for opener M0.2. 0 1 250 ms As soon as the time runs out, the timer is restarted. Because of this, the signal check made by ––| / |–– M0.2 produces a signal state of 1 only briefly. The negated (inverted) RLO: 0 1 250 ms Every 250 ms the RLO bit is 0. The jump is ignored and the contents of memory word MW100 is incremented by 1. Programming Examples B.3 Example: Timer Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 200 Reference Manual, 04/2017, A5E41524738-AA Achieving a Specific Frequency From the individual bits of memory bytes MB101 and MB100 you can achieve the following frequencies: Bits of MB101/MB100 Frequency in Hz Duration M 101.0 2.0 0.5 s (250 ms on / 250 ms off) M 101.1 1.0 1 s (0.5 s on / 0.5 s off) M 101.2 0.5 2 s (1 s on / 1 s off) M 101.3 0.25 4 s (2 s on / 2 s off) M 101.4 0.125 8 s (4 s on / 4 s off) M 101.5 0.0625 16 s (8 s on / 8 s off) M 101.6 0.03125 32 s (16 s on / 16 s off) M 101.7 0.015625 64 s (32 s on / 32 s off) M 100.0 0.0078125 128 s (64 s on / 64 s off) M 100.1 0.0039062 256 s (128 s on / 128 s off) M 100.2 0.0019531 512 s (256 s on / 256 s off) M 100.3 0.0009765 1024 s (512 s on / 512 s off) M 100.4 0.0004882 2048 s (1024 s on / 1024 s off) M 100.5 0.0002441 4096 s (2048 s on / 2048 s off) M 100.6 0.000122 8192 s (4096 s on / 4096 s off) M 100.7 0.000061 16384 s (8192 s on / 8192 s off) Signal states of the Bits of Memory MB 101 Scan Cycle Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Time Value in ms 0 0 0 0 0 0 0 0 0 250 1 0 0 0 0 0 0 0 1 250 2 0 0 0 0 0 0 1 0 250 3 0 0 0 0 0 0 1 1 250 4 0 0 0 0 0 1 0 0 250 5 0 0 0 0 0 1 0 1 250 6 0 0 0 0 0 1 1 0 250 7 0 0 0 0 0 1 1 1 250 8 0 0 0 0 1 0 0 0 250 9 0 0 0 0 1 0 0 1 250 10 0 0 0 0 1 0 1 0 250 11 0 0 0 0 1 0 1 1 250 12 0 0 0 0 1 1 0 0 250 Programming Examples B.3 Example: Timer Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 201 Signal state of Bit 1 of MB 101 (M 101.1) Frequency = 1/T = 1/1 s = 1 Hz M 101.1 250 ms 0.5 s 0.75 s 1 s 1.25 s 1.5 s T Time 0 1 0 Programming Examples B.4 Example: Counter and Comparison Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 202 Reference Manual, 04/2017, A5E41524738-AA B.4 Example: Counter and Comparison Instructions Storage Area with Counter and Comparator The following figure shows a system with two conveyor belts and a temporary storage area in between them. Conveyor belt 1 delivers packages to the storage area. A photoelectric barrier at the end of conveyor belt 1 near the storage area determines how many packages are delivered to the storage area. Conveyor belt 2 transports packages from the temporary storage area to a loading dock where trucks take the packages away for delivery to customers. A photoelectric barrier at the end of conveyor belt 2 near the storage area determines how many packages leave the storage area to go to the loading dock. A display panel with five lamps indicates the fill level of the temporary storage area. Display Panel Storage area empty (Q 12.0) Storage area not empty (Q 12.1) Storage area 50% full (Q 15.2) Storage area 90% full (Q 15.3) Storage area Filled to capacity (Q 15.4) Temporary storage area for 100 packages Packages in Packages out Conveyor belt 2 Conveyor belt 1 Photoelectric barrier 1 Photoelectric barrier 2 I 12.0 I 12.1 Programming Examples B.4 Example: Counter and Comparison Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 203 Ladder Logic Program that Activates the Indicator Lamps on the Display Panel Network 1: Counter C1 counts up at each signal change from "0" to "1" at input CU and counts down at each signal change from "0" to "1" at input CD. With a signal change from "0" to "1" at input S, the counter value is set to the value PV. A signal change from "0" to "1" at input R resets the counter value to "0". MW200 contains the current counter value of C1. Q12.1 indicates "storage area not empty". Q 12.1 I 12.3 I 12.1 I 12.2 I 12.0 S_CUD CD Q CU S PV CV R CV _ BCD C1 MW210 C#10 MW200 Network 2: Q12.0 indicates "storage area empty". Q 12.1 Q 12.0 Network 3: If 50 is less than or equal to the counter value (in other words if the current counter value is greater than or equal to 50), the indicator lamp for "storage area 50% full" is lit. Q 15.2 CMP IN1 <= I IN2 50 MW210 Programming Examples B.4 Example: Counter and Comparison Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 204 Reference Manual, 04/2017, A5E41524738-AA Network 4: Network 4: If the counter value is greater than or equal to 90, the indicator lamp for "storage area 90% full" is lit. Q 15.3 CMP IN1 >= I IN2 MW210 90 Network 5: If the counter value is greater than or equal to 100, the indicator lamp for "storage area full" is lit. Q 15.4 CMP IN1 >= I IN2 MW210 100 Programming Examples B.5 Example: Integer Math Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 205 B.5 Example: Integer Math Instructions Solving a Math Problem The sample program shows you how to use three integer math instructions to produce the same result as the following equation: MW4 = ((IW0 + DBW3) x 15) / MW0 Ladder Logic Program Network 1: Open Data Block DB1. OPN DB1 Network 2: Input word IW0 is added to shared data word DBW3 (data block must be defined and opened) and the sum is loaded into memory word MW100. MW100 is then multiplied by 15 and the answer stored in memory word MW102. MW102 is divided by MW0 with the result stored in MW4. ADD_I IN1 ENO EN IN2 OUT DBW3 IW0 MW100 MUL_I IN1 ENO EN IN2 OUT MW100 15 MW102 DIV_I IN1 ENO EN IN2 OUT MW102 MW0 MW4 Programming Examples B.6 Example: Word Logic Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 206 Reference Manual, 04/2017, A5E41524738-AA B.6 Example: Word Logic Instructions Heating an Oven The operator of the oven starts the oven heating by pushing the start push button. The operator can set the length of time for heating by using the thumbwheel switches shown in the figure. The value that the operator sets indicates seconds in binary coded decimal (BCD) format. System Component Absolute Address Start Push Button I 0.7 Thumbwheel for ones I 1.0 to I 1.3 Thumbwheel for tes I 1.4 to I 1.7 Thumbwheel for hundreds I 0.0 to I 0.3 Heating starts Q 4.0 Programming Examples B.6 Example: Word Logic Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 207 Ladder Logic Program Network 1: If the timer is running, then turn on the heater. T1 Q 4.0 Network 2: If the timer is running, the Return instruction ends the processing here. T1 RET Network 3: Mask input bits I 0.4 through I 0.7 (that is, reset them to 0). These bits of the thumbwheel inputs are not used. The 16 bits of the thumbwheel inputs are combined with W#16#0FFF according to the (Word) And Word instruction. The result is loaded into memory word MW1. In order to set the time base of seconds, the preset value is combined with W#16#2000 according to the (Word) Or Word instruction, setting bit 13 to 1 and resetting bit 12 to 0. WAND_W IN1 ENO EN IN2 OUT W#16#FFF IW0 MW1 WOR_W IN1 ENO EN IN2 OUT MW1 W#16#2000 MW2 Network 4: Start timer T 1 as an extended pulse timer if the start push button is pressed, loading as a preset value memory word MW2 (derived from the logic above). I 0.7 SE T1 MW2 Programming Examples B.6 Example: Word Logic Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 208 Reference Manual, 04/2017, A5E41524738-AA Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 209 C Working with Ladder Logic C.1 Types of Blocks Your programs are subdivided into blocks that make it possible for you to structure the programs. A block is a self-contained part of your program distinguished by its particular function. In STEP 7, a distinction is made between a logic block containing instruction statements for signal processing (OB, FB, SFB, FC, SFC) and a data block (DB, DI) used for data storage. Logic blocks are used as software modules for programs and subroutines. The top level is OB1 (organization block 1). When a block is called from another block, the blocks can exchange parameters by programming the blocks' variable declaration tables. For example, the called block may be programmed to accept several in/out parameters from a calling block. The called block then processes these input values into a result before returning the result value and program control to the calling block. The difference between the statements CALL FC1 (call a function) and CALL FB1, DB2 (call a function block) is that the function does not save the previous processing. That is, call parameters and assignments in local memory are deleted during function processing if another block is called. A call to a function block has an associated instance data block which stores block-specific variables according to the FB variable declaration table. There are two types of data blocks: 1. Data blocks that contain user data organized in a structure that you create. Any logic block can open these data blocks for read/write operations. 2. Instance data blocks used to store the call parameters and static local data used during an execution instance of a function block. You write the data blocks and logic blocks with the STL, Ladder, or FBD Editor. STEP 7 comes supplied with various standard blocks. Working with Ladder Logic C.2 EN/ENO Mechanism Ladder Logic (LAD) for S7-300 and S7-400 Programming 210 Reference Manual, 04/2017, A5E41524738-AA C.2 EN/ENO Mechanism The enable (EN) and enable output (ENO) of FBD/LAD boxes is achieved by means of the BR bit. If EN and ENO are connected, the following applies: ENO = EN AND NOT (box error) If no error occurs (box error = 0), ENO = EN. The EN/ENO mechanism is used for: • Math instructions, • Transfer and conversion instructions, • Shift and rotate instructions, • Block calls. This mechanism is not used for: • Comparisons, • Counters, • Timers. Around the actual instructions in the box, additional STL instructions are generated for the EN/ENO mechanism with dependency on the existing preceding and subsequent logic operations. The four possible cases are shown using the example of an adder: 4. Adder with EN and with ENO Connected 5. Adder with EN and without ENO Connected 6. Adder without EN and with ENO Connected 7. Adder without EN and without ENO Connected Note on Creating Your Own Blocks If you want to program blocks which you want to call in FBD or LAD, you must ensure that the BR bit is set when the block is exited. The fourth example shows that this is not automatically the case. You cannot use the BR as a memory bit because it is constantly overwritten by the EN/ENO mechanism. Instead, use a temporary variable in which you save any errors which occur. Initialize this variable with 0. At each point in the block at which you think an unsuccessful instruction represents an error for the whole block, set this variable using the assistance of the EN/ENO mechanism. A NOT and a SET coil will be sufficient for this. At the end of the block program the following network: end: AN error SAVE Ensure that this network is processed in every case, which means you must not use BEC within the block and skip this network. Working with Ladder Logic C.2 EN/ENO Mechanism Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 211 C.2.1 Adder with EN and with ENO Connected If the adder has an EN and an ENO connected, the following STL instructions are triggered: 1 A I 0.0 // EN connection 2 JNB _001 // Shift RLO into BR and jump if RLO = 0 3 L in1 // Box parameter 4 L in2 // Box parameter 5 +I // Actual addition 6 T out // Box parameter 7 AN OV // Error recognition 8 SAVE // Save error in BR 9 CLR // First check 10 _001: A BR // Shift BR into RLO 11 = Q 4.0 Following line 1 the RLO contains the result of the preceding logic operation. The JNB instruction copies the RLO into the BR bit and sets the first check bit. • If the RLO = 0, the program jumps to line 10 and resumes with A BR. The addition is not executed. In line 10 the BR is copied into the RLO again and 0 is thus assigned to the output. • If the RLO = 1, the program does not jump, meaning the addition is executed. In line 7 the program evaluates whether an error occurred during addition, this is then stored in BR in line 8. Line 9 sets the first check bit. Now the BR bit is copied back into the RLO in line 10 and thus the output shows whether the addition was successful or not. The BR bit is not changed by lines 10 and 11, so it also shows whether the addition was successful. Working with Ladder Logic C.2 EN/ENO Mechanism Ladder Logic (LAD) for S7-300 and S7-400 Programming 212 Reference Manual, 04/2017, A5E41524738-AA C.2.2 Adder with EN and without ENO Connected If the adder has an EN but no ENO connected, the following STL instructions are triggered: 1 A I 0.0 // EN connection 2 JNB _001 // Shift RLO into BR and jump if RLO = 0 3 L in1 // Box parameter 4 L in2 // Box parameter 5 +I // Actual addition 6 T out // Box parameter 7 _001: NOP 0 Following line 1 the RLO contains the result of the preceding logic operation. The JNB instruction copies the RLO into the BR bit and sets the first check bit. • If the RLO = 0, the program jumps to line 7 and the addition is not executed. The RLO and BR are 0. • If RLO was 1, the program does not jump, meaning the addition is executed. The program does not evaluate whether an error occurred during addition. The RLO and BR are 1. C.2.3 Adder without EN and with ENO Connected If the adder has no EN but an ENO connected, the following STL instructions are triggered: 1 L in1 // Box parameter 2 L in2 // Box parameter 3 +I // Actual addition 4 T out // Box parameter 5 AN OV // Error recognition 6 SAVE // Save error in BR 7 CLR // First check 8 A BR // Shift BR into RLO 9 = Q 4.0 The addition is executed in every case. In line 5 the program evaluates whether an error occurred during addition, this is then stored in BR in line 6. Line 7 sets the first check bit. Now the BR bit is copied back into the RLO in line 8 and thus the output shows whether the addition was successful or not. The BR bit is not changed by lines 8 and 9, so it also shows whether the addition was successful. Working with Ladder Logic C.2 EN/ENO Mechanism Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 213 C.2.4 Adder without EN and without ENO Connected If the adder has no EN and no ENO connected, the following STL instructions are triggered: 1 L in1 // Box parameter 2 L in2 // Box parameter 3 +I // Actual addition 4 T out // Box parameter 5 NOP 0 The addition is executed. The RLO and the BR bit remain unchanged. Working with Ladder Logic C.3 Parameter Transfer Ladder Logic (LAD) for S7-300 and S7-400 Programming 214 Reference Manual, 04/2017, A5E41524738-AA C.3 Parameter Transfer The parameters of a block are transferred as a value. With function blocks a copy of the actual parameter value in the instance data block is used in the called block. With functions a copy of the actual value lies in the local data stack. Pointers are not copied. Prior to the call the INPUT values are copied into the instance DB or to the L stack. After the call the OUTPUT values are copied back into the variables. Within the called block you can only work on a copy. The STL instructions required for this are in the calling block and remain hidden from the user. Note If memory bits, inputs, outputs or peripheral I/Os are used as actual address of a function they are treated in a different way than the other addresses. Here, updates are carried out directly, not via L Stack. Exception: If the corresponding formal parameter is an input parameter of the data type BOOL, the current parameters are updated via the L stack. ! Caution When programming the called block, ensure that the parameters declared as OUTPUT are also written. Otherwise the values output are random! With function blocks the value will be the value from the instance DB noted by the last call, with functions the value will be the value which happens to be in the L stack. Note the following points: • Initialize all OUTPUT parameters if possible. • Try not to use any Set and Reset instructions. These instructions are dependent on the RLO. If the RLO has the value 0, the random value will be retained. • If you jump within the block, ensure that you do not skip any locations where OUTPUT parameters are written. Do not forget BEC and the effect of the MCR instructions. Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 215 Index ( ---( ) 17 ---( # )--- 18 ---( CD ) 65 ---( CU ) 64 ---( JMPN ) 72 ---( N )--- 24 ---( P )--- 25 ---( R ) 19 ---( S ) 21 ---( SA ) 175 ---( SC ) 63 ---( SD ) 171 ---( SE ) 169, 171 ---( SF ) 175 ---( SI ) 167 ---( SP ) 167 ---( SS ) 173 ---( SV ) 169 ---( SZ ) 63 ---( ZR ) 65 ---( ZV ) 64 ---(Call) 108 ---(JMP)--- 70, 71 ---(MCR<) 120 ---(MCR>) 122, 123 ---(MCRA) 124 ---(MCRD) 125, 126 ---(OPN) 67 ---(RET) 126 ---(SAVE) 26 (Word) AND Double Word 180 (Word) AND Word 178 (Word) Exclusive OR Double Word 183 (Word) Exclusive OR Word 182 (Word) OR Double Word 181 (Word) OR Word 179 | ---| |--- 141 ---| |--- 14 ---| / |--- 15, 141 --|NOT|-- 16 < <=0 ---| |--- 152 <=0 ---| / |--- 152 <>0 ---| |--- 148 <>0 ---| / |--- 148 <0 ---| |--- 150 <0 ---| / |--- 150 = ==0 ---| |--- 147 ==0 ---| / |--- 147 > >=0 ---| |--- 151 >=0 ---| / |--- 151 >0 ---| |--- 149 >0 ---| / |--- 149 A ABS 94 ACOS 103 Add Double Integer 81 Add Integer 77 Add Real 89 ADD_DI 81 ADD_I 77 ADD_R 90 Adder with EN and with ENO Connected 211 Adder with EN and without ENO Connected 212 Adder without EN and with ENO Connected 212 Index Ladder Logic (LAD) for S7-300 and S7-400 Programming 216 Reference Manual, 04/2017, A5E41524738-AA Adder without EN and without ENO Connected 213 Address Negative Edge Detection 27 Address Positive Edge Detection 28 ASIN 102 Assign a Value 105 ATAN 104 B BCD to Double Integer 43 BCD to Integer 40 BCD_DI 43 BCD_I 40 Bit Exclusive OR 15 Blocks 209 BR ---| |--- 146 BR ---| / |--- 146 C Call Block from a Library 118 Call FB from Box 110 Call FC from Box 112 Call FC SFC from Coil (without Parameters) 108 Call Multiple Instance 118 Call System FB from Box 114 Call System FC from Box 116 CALL_FB 110 CALL_FC 112 CALL_SFB 114 CALL_SFC 116 CEIL 53 Ceiling 53 CMP ? D 35 CMP ? I 34 CMP ? R 37 Conditional Jump 71 COS 100 D DI_BCD 44 DI_REAL 45 DIV_DI 84 DIV_I 80 DIV_R 93 Divide Double Integer 84 Divide Integer 80 Divide Real 93 Double Integer to BCD 44 Double Integer to Floating-Point 45 Down Counter 61 Down Counter Coil 65 E EN/ENO Mechanism 210 Establish the Absolute Value of a Floating-Point Number 94 Establish the Arc Cosine Value 103 Establish the Arc Sine Value 102 Establish the Arc Tangent Value 104 Establish the Cosine Value 100 Establish the Exponential Value 97 Establish the Natural Logarithm 98 Establish the Sine Value 99 Establish the Square 95 Establish the Square Root 96 Establish the Tangent Value 101 Evaluating the Bits of the Status Word with Integer Math Instructions 76 Evaluation of the Bits in the Status Word 88 Example Bit Logic Instructions 194 Counter and Comparison Instructions 202 Integer Math Instructions 205 Timer Instructions 198 Word Logic Instructions 206 Exception Bit Binary Result 146 Exception Bit Overflow 142 Exception Bit Overflow Stored 143 Exception Bit Unordered 145 EXP 97 Extended Pulse S5 Timer 159 Extended Pulse Timer Coil 169 Index Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 217 F Floating-Point Math Instructions 88 Floor 54 FLOOR 54 I I_BCD 41 I_DINT 42 Immediate Read 29 Immediate Write 30 Important Notes on Using MCR Functions 119 Integer to BCD 41 Integer to Double Integer 42 INV_DI 47 INV_I 46 Invert Power Flow 16 J Jump Instructions 73 Jump-If-Not 72 L Label 73 LABEL 73 LAD Instructions Sorted According to English Mnemonics (International) 185 LAD Instructions Sorted According to German Mnemonics (SIMATIC) 189 LN 98 Location of a Timer in Memory and Components of a Timer 154 M Master Control Relay Activate 124 Master Control Relay Deactivate 125 Master Control Relay Off 122 Master Control Relay On 120 Midline Output 18, 19 Mnemonics English (International) 185 German (SIMATIC) 189 MOD_DI 85 MOVE 105, 106 MUL_DI 83 MUL_I 79 MUL_R 92 Multiply Double Integer 83 Multiply Integer 79 Multiply Real 92 N NEG 27 NEG_DI 49 NEG_I 48 NEG_R 50 Negate Floating-Point Number 50 Negated Exception Bit Binary Result 146 Negated Exception Bit Overflow 142 Negated Exception Bit Overflow Stored 143 Negated Exception Bit Unordered 145 Negated Result Bit Equal 0 147 Negated Result Bit Greater Equal 0 151 Negated Result Bit Greater Than 0 149 Negated Result Bit Less Equal 0 152 Negated Result Bit Less Than 0 150 Negated Result Bit Not Equal 0 148 Negative RLO Edge Detection 24 Normally Closed Contact (Address) 15 Normally Open Contact (Address) 14 O Off-Delay S5 Timer 165 Off-Delay Timer Coil 175 On-Delay S5 Timer 161 On-Delay Timer Coil 171 Ones Complement Double Integer 47 Ones Complement Integer 46 Open Data Block DB or DI 67 OS ---| |--- 143 OS ---| / |--- 143 Index Ladder Logic (LAD) for S7-300 and S7-400 Programming 218 Reference Manual, 04/2017, A5E41524738-AA Output Coil 17 OV ---| |--- 142 OV ---| / |--- 142 Overview of Bit Logic Instructions 13 Overview of Comparison Instructions 33 Overview of Conversion Instructions 39 Overview of Counter Instructions 55 Overview of Floating-Point Math Instructions 87 Overview of Integer Math Instructions 75 Overview of Logic Control Instructions 69 Overview of Programming Examples 193 Overview of Rotate Instructions 137 Overview of Shift Instructions 127 Overview of Timer Instructions 153 Overview of Word Logic Instructions 177 Overview over Program Control Instructions 107 P Parameter Transfer 214 POS 28 Positive RLO Edge Detection 25 Practical Applications 193 Pulse S5 Timer 157 Pulse Timer Coil 167 R Reset Coil 20 Reset-Set Flip Flop 22 Result Bit Equal 0 147 Result Bit Greater Equal 0 151 Result Bit Greater Than 0 149 Result Bit Less Equal 0 152 Result Bit Less Than 0 150 Result Bit Not Equal 0 148 Retentive On-Delay S5 Timer 163 Retentive On-Delay Timer Coil 173 Return 126 Return Fraction Double Integer 85 ROL_DW 138 ROR_DW 139, 140 Rotate Left Double Word 137 Rotate Right Double Word 139 ROUND 51 Round to Double Integer 51 RS 22 S S_AVERZ 165 S_CD 61 S_CU 59 S_CUD 57 S_EVERZ 161 S_IMPULS 157 S_ODT 161 S_ODTS 163 S_OFFDT 165 S_PEXT 159 S_PULSE 157 S_SEVERZ 163 S_VIMP 159 Save RLO into BR Memory 26 Set Coil 21 Set Counter Value 63 Set-Reset Flip Flop 23 Shift Left Double Word 134 Shift Left Word 131 Shift Right Double Integer 130 Shift Right Double Word 135 Shift Right Integer 128 Shift Right Word 133 SHL_DW 134 SHL_W 131, 132 SHR_DI 130 SHR_DW 135, 136 SHR_I 128, 129 SHR_W 133 SIN 99 SQR 95 SQRT 96 SR 23 SUB_DI 82 SUB_I 78 SUB_R 91 Subtract Double Integer 82 Subtract Integer 78 Subtract Real 91 Index Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 219 T TAN 101 TRUNC 52 Truncate Double Integer Part 52 Twos Complement Double Integer 49 Twos Complement Integer 48 Types of Blocks 209 U Unconditional Jump 70 UO ---| |--- 145 UO ---| / |--- 145 Up Counter 59 Up Counter Coil 64 Up-Down Counter 57 W WAND_DW 180 WAND_W 178 WOR_DW 181 WOR_W 179 WXOR_DW 183 WXOR_W 182 X XOR 15 Z Z_RUECK 61 Z_VORW 59 ZÄHLER 57 Index Ladder Logic (LAD) for S7-300 and S7-400 Programming 220 Reference Manual, 04/2017, A5E41524738-AA Yüklə 1,39 Mb. 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