Ladder Logic (lad) for S7-300 and S7-400 Programming
S_PEXT Extended Pulse S5 Timer
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13.4 S_PEXT Extended Pulse S5 Timer Symbol S_PEXT BI TV R BCD S_VIMP DUAL TW S Q English German T no. T-Nr. S Q R DEZ Parameter English Parameter German Data Type Memory Area Description T no. T-Nr. TIMER T Timer identification number; range depends on CPU S S BOOL I, Q, M, L, D Start input TV TW S5TIME I, Q, M, L, D Preset time value R R BOOL I, Q, M, L, D Reset input BI DUAL WORD I, Q, M, L, D Remaining time value, integer format BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD format Q Q BOOL I, Q, M, L, D Status of the timer Description S_PEXT (Extended Pulse S5 Timer) starts the specified timer if there is a positive edge at the start (S) input. A signal change is always necessary in order to enable a timer. The timer runs for the preset time interval specified at input TV even if the signal state at the S input changes to "0" before the time interval has elapsed. The signal state at output Q is "1" as long as the timer is running. The timer will be restarted ("re-triggered") with the preset time value if the signal state at input S changes from "0" to "1" while the timer is running. The timer is reset if the reset (R) input changes from "0" to "1" while the timer is running. The current time and the time base are set to zero. The current time value can be scanned at the outputs BI and BCD. The time value at BI is binary coded, at BCD is BCD coded. The current time value is the initial TV value minus the time elapsed since the timer was started. See also "Location of a Timer in Memory and Components of a Timer". Timer Instructions 13.4 S_PEXT Extended Pulse S5 Timer Ladder Logic (LAD) for S7-300 and S7-400 Programming 160 Reference Manual, 04/2017, A5E41524738-AA Timing Diagram Extended pulse timer characteristics: t t t t = Programmed time RLO at S input RLO at R input Timer running Scan for "1" Scan for "0" t Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - x x x 1 Example S_PEXT S Q BI TV R BCD I 0.0 I 0.1 S5TIME#2S Q 4.0 T 5 If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the timer T5 will be started. The timer will continue to run for the specified time of two seconds (2 s) without being affected by a negative edge at input S. If the signal state of I0.0 changes from "0" to "1" before the timer has expired the timer will be re-triggered. The output Q4.0 is logic "1" as long as the timer is running. Timer Instructions 13.5 S_ODT On-Delay S5 Timer Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 161 13.5 S_ODT On-Delay S5 Timer Symbol S_ODT BI TV R BCD S_EVERZ DUAL TW S Q English German T no. T-Nr. S Q R DEZ Parameter English Parameter German Data Type Memory Area Description T no. T-Nr. TIMER T Timer identification number; range depends on CPU S S BOOL I, Q, M, L, D Start input TV TW S5TIME I, Q, M, L, D Preset time value R R BOOL I, Q, M, L, D Reset input BI DUAL WORD I, Q, M, L, D Remaining time value, integer format BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD format Q Q BOOL I, Q, M, L, D Status of the timer Description S_ODT (On-Delay S5 Timer) starts the specified timer if there is a positive edge at the start (S) input. A signal change is always necessary in order to enable a timer. The timer runs for the time interval specified at input TV as long as the signal state at input S is positive. The signal state at output Q is "1" when the timer has elapsed without error and the signal state at the S input is still "1". When the signal state at input S changes from "1" to "0" while the timer is running, the timer is stopped. In this case the signal state of output Q is "0". The timer is reset if the reset (R) input changes from "0" to "1" while the timer is running. The current time and the time base are set to zero. The signal state at output Q is then "0". The timer is also reset if there is a logic "1" at the R input while the timer is not running and the RLO at input S is "1". The current time value can be scanned at the outputs BI and BCD. The time value at BI is binary coded, at BCD is BCD coded. The current time value is the initial TV value minus the time elapsed since the timer was started. See also "Location of a Timer in Memory and Components of a Timer". Timer Instructions 13.5 S_ODT On-Delay S5 Timer Ladder Logic (LAD) for S7-300 and S7-400 Programming 162 Reference Manual, 04/2017, A5E41524738-AA Timing Diagram On-Delay timer characteristics: t t = Programmed time RLO at S input RLO at R input Timer running Scan for "1" Scan for "0" t t Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - x x x 1 Example S_ODT S Q BI TV R BCD I 0.0 I 0.1 S5TIME#2S Q 4.0 T 5 If the signal state of I0.0 changes from "0" to "1" (positive edge in RLO), the timer T5 will be started. If the time of two seconds elapses and the signal state at input I0.0 is still "1", the output Q4.0 will be "1". If the signal state of I0.0 changes from "1" to "0", the timer is stopped and Q4.0 will be "0" (if the signal state of I0.1 changes from "0" to "1", the time is reset regardless of whether the timer is running or not). Timer Instructions 13.6 S_ODTS Retentive On-Delay S5 Timer Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 163 13.6 S_ODTS Retentive On-Delay S5 Timer Symbol S_ODTS BI TV R BCD S_SEVERZ DUAL TW S Q English German T no. T-Nr. S Q R DEZ Parameter English Parameter German Data Type Memory Area Description T no. T-Nr. TIMER T Timer identification number; range depends on CPU S S BOOL I, Q, M, L, D Start input TV TW S5TIME I, Q, M, L, D Preset time value R R BOOL I, Q, M, L, D Reset input BI DUAL WORD I, Q, M, L, D Remaining time value, integer format BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD format Q Q BOOL I, Q, M, L, D Status of the timer Description S_ODTS (Retentive On-Delay S5 Timer) starts the specified timer if there is a positive edge at the start (S) input. A signal change is always necessary in order to enable a timer. The timer runs for the time interval specified at input TV even if the signal state at input S changes to "0" before the time interval has elapsed. The signal state at output Q is "1" when the timer has elapsed without regard to the signal state at input S. The timer will be restarted (re-triggered) with the specified time if the signal state at input S changes from "0" to "1" while the timer is running. The timer is reset if the reset (R) input changes from "0" to "1" without regard to the RLO at the S input. The signal state at output Q is then "0". The current time value can be scanned at the outputs BI and BCD. The time value at BI is binary coded, at BCD it is BCD coded. The current time value is the initial TV value minus the time elapsed since the timer was started. Timer Instructions 13.6 S_ODTS Retentive On-Delay S5 Timer Ladder Logic (LAD) for S7-300 and S7-400 Programming 164 Reference Manual, 04/2017, A5E41524738-AA Timing Diagram Retentive On-Delay timer characteristics: t t t t = Programmed time t RLO at S input RLO at R input Timer running Scan for "1" Scan for "0" Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - x x x 1 Example S_ODTS S Q BI TV R BCD I 0.0 I 0.1 S5TIME#2S Q 4.0 T 5 If the signal state of I0.0 changes from "0" to "1" (positive edge in RLO), the timer T5 will be started. The timer runs without regard to a signal change at I0.0 from "1" to "0". If the signal state at I0.0 changes from "0" to "1" before the timer has expired, the timer will be re-triggered. The output Q4.0 will be "1" if the timer elapsed. (If the signal state of input I0.1 changes from "0" to "1", the time will be reset irrespective of the RLO at S.) Timer Instructions 13.7 S_OFFDT Off-Delay S5 Timer Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 165 13.7 S_OFFDT Off-Delay S5 Timer Symbol S_OFFDT BI TV R BCD S_AVERZ DUAL TW S Q English German T no. T-Nr. S Q R DEZ Parameter English Parameter German Data Type Memory Area Description T no. T-Nr. TIMER T Timer identification number; range depends on CPU S S BOOL I, Q, M, L, D Start input TV TW S5TIME I, Q, M, L, D Preset time value R R BOOL I, Q, M, L, D Reset input BI DUAL WORD I, Q, M, L, D Remaining time value, integer format BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD format Q Q BOOL I, Q, M, L, D Status of the timer Description S_OFFDT (Off-Delay S5 Timer) starts the specified timer if there is a negative edge at the start (S) input. A signal change is always necessary in order to enable a timer. The signal state at output Q is "1" if the signal state at the S input is "1" or while the timer is running. The timer is reset when the signal state at input S goes from "0" to "1" while the timer is running. The timer is not restarted until the signal state at input S changes again from "1" to "0". The timer is reset when the reset (R) input changes from "0" to "1" while the timer is running. The current time value can be scanned at the outputs BI and BCD. The time value at BI is binary coded, at BCD it is BCD coded. The current time value is the initial TV value minus the time elapsed since the timer was started. Timer Instructions 13.7 S_OFFDT Off-Delay S5 Timer Ladder Logic (LAD) for S7-300 and S7-400 Programming 166 Reference Manual, 04/2017, A5E41524738-AA Timing Diagram Off-Delay timer characteristics: t t t t = Programmed time RLO at S input RLO at R input Timer running Scan for "1" Scan for "0" t Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - x x x 1 Example S_OFFDT S Q BI TV R BCD I 0.0 I 0.1 S5TIME#2S Q 4.0 T 5 If the signal state of I0.0 changes from "1" to "0", the timer is started. Q4.0 is "1" when I0.0 is "1" or the timer is running. (if the signal state at I0.1 changes from "0" to "1" while the time is running, the timer is reset). Timer Instructions 13.8 ---( SP ) Pulse Timer Coil Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 167 13.8 ---( SP ) Pulse Timer Coil Symbol English German ---( SP ) ---( SI ) Timer Instructions 13.8 ---( SP ) Pulse Timer Coil Ladder Logic (LAD) for S7-300 and S7-400 Programming 168 Reference Manual, 04/2017, A5E41524738-AA Example Network 3 Network 2 Network 1 I 0.0 SP T5 T5 Q 4.0 S5T#2S I 0.1 T5 R If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the timer T5 is started. The timer continues to run with the specified time of two seconds as long as the signal state of input I0.0 is "1". If the signal state of input I0.0 changes from "1" to "0" before the specified time has elapsed, the timer stops. The signal state of output Q4.0 is "1" as long as the timer is running. A signal state change from "0" to "1" at input I0.1 will reset timer T5 which stops the timer and clears the remaining portion of the time value to "0". Timer Instructions 13.9 ---( SE ) Extended Pulse Timer Coil Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 169 13.9 ---( SE ) Extended Pulse Timer Coil Symbol English German ---( SE ) ---( SV ) Timer Instructions 13.9 ---( SE ) Extended Pulse Timer Coil Ladder Logic (LAD) for S7-300 and S7-400 Programming 170 Reference Manual, 04/2017, A5E41524738-AA Example Network 3 Network 2 Network 1 I 0.0 SE T5 T5 Q A.0 S5T#2S I 0.1 T5 R If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the timer T5 is started. The timer continues to run without regard to a negative edge of the RLO. If the signal state of I0.0 changes from "0" to "1" before the timer has expired, the timer is re-triggered. The signal state of output Q4.0 is "1" as long as the timer is running. A signal state change from "0" to "1" at input I0.1 will reset timer T5 which stops the timer and clears the remaining portion of the time value to "0". Timer Instructions 13.10 ---( SD ) On-Delay Timer Coil Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 171 13.10 ---( SD ) On-Delay Timer Coil Symbol English German ---( SD ) ---( SE ) Timer Instructions 13.10 ---( SD ) On-Delay Timer Coil Ladder Logic (LAD) for S7-300 and S7-400 Programming 172 Reference Manual, 04/2017, A5E41524738-AA If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the timer T5 is started. If the time elapses and the signal state of input I0.0 is still "1", the signal state of output Q4.0 will be "1". If the signal state of input I0.0 changes from "1" to "0", the timer remains idle and the signal state of output Q4.0 will be "0". A signal state change from "0" to "1" at input I0.1 will reset timer T5 which stops the timer and clears the remaining portion of the time value to "0". Timer Instructions 13.11 ---( SS ) Retentive On-Delay Timer Coil Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 173 13.11 ---( SS ) Retentive On-Delay Timer Coil Symbol English German ---( SS ) ---( SS ) Yüklə 1,39 Mb. Dostları ilə paylaş:
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