Ladder Logic (lad) for S7-300 and S7-400 Programming
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Note After returning to the calling block, the previously open DB is not always open again. Please make sure you read the note in the README file. Program Control Instructions 10.7 Call Multiple Instance Ladder Logic (LAD) for S7-300 and S7-400 Programming 118 Reference Manual, 04/2017, A5E41524738-AA 10.7 Call Multiple Instance Symbol #Variable name ENO EN Parameter Data Type Memory Area Description EN BOOL I, Q, M, L, D Enable input ENO BOOL I, Q, M, L, D Enable output #Variable name FB, SFB - Name of multiple instance Description A multiple instance is created by declaring a static variable with the data type of a function block. Only multiple instances that have already been declared are included in the program element catalog. The symbol for a multiple instance varies depending on whether and how many parameters are present. EN, ENO and the variable name are always present. Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - 0 0 x x x 10.8 Call Block from a Library The libraries available in the SIMATIC Manager can be used here to select a block that • Is integrated in your CPU operating system ("Standard Library" library for STEP 7 projects in version 3 and "stdlibs (V2)" for STEP 7 projects in version 2) • You saved yourself in a library because you wanted to use it a number of times. Program Control Instructions 10.9 Important Notes on Using MCR Functions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 119 10.9 Important Notes on Using MCR Functions ! Take care with blocks in which the Master Control Relay was activated with MCRA: • If the MCR is deactivated, the value 0 is written by all assignments in program segments between --- (MCR<) and ---(MCR>). This is valid for all boxes which contain an assignment, including the paramter transfer to blocks. • The MCR is deactivated if the RLO was = 0 before an MCR< instruction. ! Danger: PLC in STOP or undefined runtime characteristics! The compiler also uses write access to local data behind the temporary variables defined in VAR_TEMP for calculating addresses. This means the following command sequences will set the PLC to STOP or lead to undefined runtime characteristics: Formal parameter access • Access to components of complex FC parameters of the type STRUCT, UDT, ARRAY, STRING • Access to components of complex FB parameters of the type STRUCT, UDT, ARRAY, STRING from the IN_OUT area in a block with multiple instance capability (version 2 block). • Access to parameters of a function block with multiple instance capability (version 2 block) if its address is greater than 8180.0. • Access in a function block with multiple instance capability (version 2 block) to a parameter of the type BLOCK_DB opens DB0. Any subsequent data access sets the CPU to STOP. T 0, C 0, FC0, or FB0 are also always used for TIMER, COUNTER, BLOCK_FC, and BLOCK_FB. Parameter passing • Calls in which parameters are transferred. LAD/FBD • T branches and midline outputs in Ladder or FBD starting with RLO = 0. Remedy Free the above commands from their dependence on the MCR: 1st Deactivate the Master Control Relay using the Master Control Relay Deactivate instruction before the statement or network in question. 2nd Activate the Master Control Relay again using the Master Control Relay Activate instruction after the statement or network in question. Program Control Instructions 10.10 ---(MCR<) Master Control Relay On Ladder Logic (LAD) for S7-300 and S7-400 Programming 120 Reference Manual, 04/2017, A5E41524738-AA 10.10 ---(MCR<) Master Control Relay On Important Notes on Using MCR Functions Symbol ---(MCR<) Description ---(MCR<) (Open a Master Control Relay zone) saves the RLO in the MCR stack. The MCR nesting stack is a LIFO stack (last in, first out) and only 8 stack entries (nesting levels) are possible. If the stack is already full, the ---(MCR<) function produces an MCR stack fault (MCRF). The following elements are MCR-dependent and influenced by the RLO state that is saved to the MCR stack while opening an MCR zone: • --( # ) Midline Output • --( ) Output • --( S ) Set Output • --( R ) Reset Output • RS Reset Flip Flop • SR Set Flip Flop • MOVE Assign a Value Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - 0 1 - 0 Program Control Instructions 10.10 ---(MCR<) Master Control Relay On Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 121 Example MCR> I 0.0 I 0.3 Q 4.1 I 0.4 I 0.1 MCR zone 1 MCR zone 2 MCRA MCR< MCR< Network 8 Network 7 Network 6 Network 5 Network 4 Network 3 Network 2 Network 1 Q 4.0 S MCR> MCRD MCR functionality is activated by the MCRA rung. It is then possible to create up to eight nested MCR zones. In the example there are two MCR zones. The functions are executed as follows: I0.0 = "1" (MCR is ON for zone 1): the logic state of I0.4 is assigned to Q4.1 I0.0 = "0" (MCR is OFF for zone 1): Q4.1 is "0" regardless of the logic state of I0.4 I0.1 = "1" (MCR is ON for zone 2): Q4.0 is set to "1" if I0.3 is "1" I0.1 = "0" (MCR is OFF for zone 2): Q4.0 remains unchanged regardless the logic state of I0.3 Program Control Instructions 10.11 ---(MCR>) Master Control Relay Off Ladder Logic (LAD) for S7-300 and S7-400 Programming 122 Reference Manual, 04/2017, A5E41524738-AA 10.11 ---(MCR>) Master Control Relay Off Important Notes on Using MCR Functions Symbol ---(MCR>) Description ---(MCR>) (close the last opened MCR zone) removes an RLO entry from the MCR stack. The MCR nesting stack is a LIFO stack (last in, first out) and only 8 stack entries (nesting levels) are possible. If the stack is already empty, ---(MCR>) produces an MCR stack fault (MCRF). The following elements are MCR-dependent and influenced by the RLO state that is saved to the MCR stack while opening the MCR zone: • --( # ) Midline Output • --( ) Output • --( S ) Set Output • --( R ) Reset Output • RS Reset Flip Flop • SR Set Flip Flop • MOVE Assign a Value Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - 0 1 - 0 Program Control Instructions 10.11 ---(MCR>) Master Control Relay Off Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 123 Example MCR> I 0.0 I 0.3 Q 4.1 I 0.4 I 0.1 MCR zone 1 MCR zone 2 MCRA MCR< MCR< Network 8 Network 7 Network 6 Network 5 Network 4 Network 3 Network 2 Network 1 Q 4.0 S MCR> MCRD MCR functionality is activated by the ---(MCRA) rung. It is then possible to create up to eight nested MCR zones. In the example there are two MCR zones. The first ---(MCR>) (MCR OFF) rung belongs to the second ---(MCR<) (MCR ON) rung. All rungs between belong to the MCR zone 2. The functions are executed as follows: I0.0 = "1": the logic state of I0.4 is assigned to Q4.1 I0.0 = "0": Q4.1 is "0" regardless of the logic state of I0.4 I0.1 = "1": Q4.0 is set to "1" if I0.3 is "1" I0.1 = "0": Q4.0 remains unchanged regardless of the logic state of I0.3 Program Control Instructions 10.12 ---(MCRA) Master Control Relay Activate Ladder Logic (LAD) for S7-300 and S7-400 Programming 124 Reference Manual, 04/2017, A5E41524738-AA 10.12 ---(MCRA) Master Control Relay Activate Important Notes on Using MCR Functions Symbol ---(MCRA) Description ---(MCRA) (Activate Master Control Relay) activates master control relay function. After this command, it is possible to program MCR zones with the commands: • ---(MCR<) • ---(MCR>) Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - - - - - Example . . . I 0.0 Q 4.1 I 0.4 I 0.3 MCRA MCR< Network n + 1 Network n Network 3 Network 2 Network 1 Q 4.0 S MCR> MCRD MCR functionality is activated by the MCRA rung. The rungs between the MCR< and the MCR> (outputs Q4.0, Q4.1) are executed as follows: I0.0 = "1" ( MCR is ON ): Q4.0 is set to "1" if I0.3 is logic "1", or will remain unchanged if I0.3 is "0" and the logic state of I0.4 is assigned to Q4.1 I0.0 = "0" ( MCR is OFF): Q4.0 remains unchanged regardless of the logic state of I0.3 and Q4.1 is "0" regardless of the logic state of I0.4 Program Control Instructions 10.13 ---(MCRD) Master Control Relay Deactivate Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 125 In the next rung, the instruction ---(MCRD) deactivates the MCR. This means that you cannot program any more MCR zones using the instruction pair ---(MCR<) and ---(MCR>). 10.13 ---(MCRD) Master Control Relay Deactivate Important Notes on Using MCR Functions Symbol ---(MCRD) Description ---(MCRD) (Deactivate Master Control Relay) deactivates MCR functionality. After this command, you cannot program MCR zones. Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - - - - - Example . . . I 0.0 Q 4.1 I 0.4 I 0.3 MCRA MCR< Network n + 1 Network n Network 3 Network 2 Network 1 Q 4.0 S MCR> MCRD MCR functionality is activated by the MCRA rung. The rungs between the MCR< and the MCR> (outputs Q4.0, Q4.1) are executed as follows: I0.0 = "1" (MCR is ON): Q4.0 is set to "1" if I0.3 is logic "1" and the logic state of I0.4 is assigned to Q4.1. I0.0 = "0" (MCR is OFF): Q4.0 remains unchanged regardless of the logic state of I0.3 and Q4.1 is "0" regardless of the logic state of I0.4. Program Control Instructions 10.14 ---(RET) Return Ladder Logic (LAD) for S7-300 and S7-400 Programming 126 Reference Manual, 04/2017, A5E41524738-AA In the next rung, the instruction ---(MCRD) deactivates the MCR. This means that you cannot program any more MCR zones using the instruction pair ---(MCR<) and ---(MCR>). 10.14 ---(RET) Return Symbol ---( RET ) Description RET (Return) is used to conditionally exit blocks. For this output, a preceding logic operation is required. Status word Conditional Return (Return if RLO = "1"): BR CC 1 CC 0 OV OS OR STA RLO /FC writes: * - - - 0 0 1 1 0 * The operation RET is shown internally in the sequence "SAVE; BEC, ". This also affects the BR bit. Example I 0.0 RET . . . . . . The block is exited if I0.0 is "1". Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 127 11 Shift and Rotate Instructions 11.1 Shift Instructions 11.1.1 Overview of Shift Instructions Description You can use the Shift instructions to move the contents of input IN bit by bit to the left or the right (see also CPU Registers). Shifting to the left multiplies the contents of input IN by 2 to the power n (2 n ); shifting to the right divides the contents of input IN by 2 to the power n (2 n ). For example, if you shift the binary equivalent of the decimal value 3 to the left by 3 bits, you obtain the binary equivalent of the decimal value 24 in the accumulator. If you shift the binary equivalent of the decimal value 16 to the right by 2 bits, you obtain the binary equivalent of the decimal value 4 in the accumulator. The number that you supply for input parameter N indicates the number of bits by which to shift. The bit places that are vacated by the Shift instruction are either filled with zeros or with the signal state of the sign bit (a 0 stands for positive and a 1 stands for negative). The signal state of the bit that is shifted last is loaded into the CC 1 bit of the status word. The CC 0 and OV bits of the status word are reset to 0. You can use jump instructions to evaluate the CC 1 bit. The following shift instructions are available: • SHR_I Shift Right Integer • SHR_DI Shift Right Double Integer • SHL_W Shift Left Word • SHR_W Shift Right Word • SHL_DW Shift Left Double Word • SHR_DW Shift Right Double Word Shift and Rotate Instructions 11.1 Shift Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 128 Reference Manual, 04/2017, A5E41524738-AA 11.1.2 SHR_I Shift Right Integer Symbol SHR_I EN OUT N ENO IN Parameter Data Type Memory Area Description EN BOOL I, Q, M, L, D Enable input ENO BOOL I, Q, M, L, D Enable output IN INT I, Q, M, L, D Value to shift N WORD I, Q, M, L, D Number of bit positions to shift OUT INT I, Q, M, L, D Result of shift instruction Description SHR_I (Shift Right Integer) is activated by a logic "1" at the Enable (EN) Input. The SHR_I instruction is used to shift bits 0 to 15 of input IN bit by bit to the right. Bits 16 to 31 are not affected. The input N specifies the number of bits by which to shift. If N is larger than 16, the command acts as if N were equal to 16. The bit positions shifted in from the left to fill vacated bit positions are assigned the logic state of bit 15 (sign bit for the integer). This means these bit positions are assigned "0" if the integer is positive and "1" if the integer is negative. The result of the shift instruction can be scanned at output OUT. The CC 0 bit and the OV bit are set to "0" by SHR_I if N is not equal to 0. ENO has the same signal state as EN. 1 0 1 0 IN 15... ...8 7... ...0 4 places N OUT The vacated places are filled with the signal state of the sign bit. These four bits are lost. 1 1 1 1 0 0 0 0 1 0 1 0 1 1 1 1 1 0 1 0 1 1 1 1 0 0 0 0 1 0 1 0 Sign bit Shift and Rotate Instructions 11.1 Shift Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 129 Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: x x x x - x x x 1 Example SHR_I N IN EN MW0 MW4 Q 4.0 I 0.0 MW2 ENO OUT S The SHR_I box is activated by logic "1" at I0.0. MW0 is loaded and shifted right by the number of bits specified with MW2. The result is written to MW4. Q4.0 is set. Shift and Rotate Instructions 11.1 Shift Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 130 Reference Manual, 04/2017, A5E41524738-AA 11.1.3 SHR_DI Shift Right Double Integer Symbol SHR_DI EN OUT N ENO IN Parameter Data Type Memory Area Description EN BOOL I, Q, M, L, D Enable input ENO BOOL I, Q, M, L, D Enable output IN DINT I, Q, M, L, D Value to shift N WORD I, Q, M, L, D Number of bit positions to shift OUT DINT I, Q, M, L, D Result of shift instruction Description SHR_DI (Shift Right Double Integer) is activated by a logic "1" at the Enable (EN) Input. The SHR_DI instruction is used to shift bits 0 to 31 of input IN bit by bit to the right. The input N specifies the number of bits by which to shift. If N is larger than 32, the command acts as if N were equal to 32. The bit positions shifted in from the left to fill vacated bit positions are assigned the logic state of bit 31 (sign bit for the double integer). This means these bit positions are assigned "0" if the integer is positive and "1" if the integer is negative. The result of the shift instruction can be scanned at output OUT. The CC 0 bit and the OV bit are set to "0" by SHR_DI if N is not equal to 0. ENO has the same signal state as EN. Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: x x x x - x x x 1 Example SHR_DI N IN EN MD0 MD10 Q 4.0 I 0.0 MW4 ENO OUT S The SHR_DI box is activated by logic "1" at I0.0. MD0 is loaded and shifted right by the number of bits specified with MW4. The result is written to MD10. Q4.0 is set. Shift and Rotate Instructions 11.1 Shift Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming Reference Manual, 04/2017, A5E41524738-AA 131 11.1.4 SHL_W Shift Left Word Symbol SHL_W EN OUT N ENO IN Parameter Data Type Memory Area Description EN BOOL I, Q, M, L, D Enable input ENO BOOL I, Q, M, L, D Enable output IN WORD I, Q, M, L, D Value to shift N WORD I, Q, M, L, D Number of bit positions to shift OUT WORD I, Q, M, L, D Result of shift instruction Description SHL_W (Shift Left Word) is activated by a logic "1" at the Enable (EN) Input. The SHL_W instruction is used to shift bits 0 to 15 of input IN bit by bit to the left. Bits 16 to 31 are not affected. The input N specifies the number of bits by which to shift. If N is larger than 16, the command writes a "0" at output OUT and sets the bits CC 0 and OV in the status word to "0". N zeros are also shifted in from the right to fill vacated bit positions. The result of the shift instruction can be scanned at output OUT. The CC 0 bit and the OV bit are set to "0" by SHL_W if N is not equal to 0. ENO has the same signal state as EN. IN 6 places N OUT The vacated places are filled with zeros. These six bits are lost. 0 0 0 0 15... ...8 7... ...0 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 0 1 1 0 1 0 0 0 0 0 0 1 1 0 1 Yüklə 1,39 Mb. Dostları ilə paylaş:
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